ADF-QMx42

Quad 12 Gsps 16-bit DAC
& Dual 6 Gsps 12-bit ADC

Example Image Shown

JESD204C / JESD204B Interface
VITA 57.1 FMC

  • Wide Dynamic Range
  • High Channel Density
  • Ideal for SWaP-C Sensitive Application
  • Designed for Xilinx UltraScale and UltraScale+ FPGA Carrier Boards
  • Built-in Clock Jitter Cleaner 
  • Configurable digital up/down conversion (DDC/DUC)
  • Analog Device part: AD9082

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The DEG ADF-QMx42 FMC leverages the Analog Devices AD9082 MxFE (Mixed Signal Front End) transceiver technology. This highly integrated device includes a quad 16-bit, 12 Gsps sample rate radio frequency (RF) digital-to-analog converter (DAC) and a dual 12-bit, 6 Gsps rate RF analog-to-digital converter (ADC). The ADF-QMx42 features an 8-lane, 24.75 Gbps JESD204C transceiver port, an on-chip clock multiplier, digital signal processing capability and supports four transmitter channels and two receiver channels.

The  ADF-QMx42 is a VITA 57.1-2019 compliant FPGA Mezzanine Card (FMC) that offers industry-wide platform compatibility with Xilinx UltraScale and UltraScale+ FPGA carrier boards, including DEG’s performance-leading, PCI Express and 3U Open VPX carrier products. 

Flexible & Cost-Effective Solution

By coupling this core architecture with the compact and flexible FMC form factor, DEG has enabled customers to rapidly and cost-effectively build compact and rugged systems of high-speed digitization on a single high-performance FPGA carrier board.
The front panel of the ADF-QMx42 provides ten SMA coaxial connections for the two analog inputs, four analog outputs, an external trigger, an external clock or reference, and two connectors for board to board channel alignment.